SiC wafer tray for dry etching (counterbore type)

This is a SiC tray for loading 4-inch wafers. Three wafers can be loaded in the form of Φ230 × 2t. The part where the wafer is placed is the shape of the counter bored hole. We used our machining center to machine holes with Φ102 and a depth of 0.82. Accuracy of counter bored hole is upper tolerance +0.1 lower tolerance 0, accuracy of counter bored depth is upper tolerance 0 lower tolerance-0.05. The plane parallelism of the counter bore is about 0.05. In addition, U-shaped notch processing of width 3×length 3.5 is applied. The surface roughness is Ra0.8. Asuzac Corporation, which operates the Ceramics Design Lab, provides a full range of services from the preparation, granulation, and molding of SiC raw materials to green processing (raw processing), sintering, secondary processing, inspection, and cleaning. In addition to wafer trays such as this product, we have a large number of experience in manufacturing ceramic products such as wafer Transfer End Effector / Handling Arm (including those developed in-house), suction chucks, and setters for sintering. For the design and manufacture of ceramics products for semiconductors and electronic components, leave it to Asuzac.